Failure Mode Avoidance
Typical Situations
Are you sometimes puzzled by products that suddenly fail in customers’ hands, despite successfully passing your verification test procedures?
You even made costly changes prior to product launch and did extensive testing to verify these changes?
On a future product you want to apply upfront reliability analysis and prediction, but wonder how to get useful component field data?
Our Solution
Failure Mode Avoidance (FMA) is a pragmatic quality methodology that focuses on finding design failures early in the development process. Applying proper countermeasures to fix the failure modes and intelligent verification testing ensures that they do not escape into the field. This is in contrast to the traditional reliability approach of trying to predict the rate at which a failure mode occurs in the field assuming it will escape. Often the lack of useful reliability field data requires application of the Failure Mode Avoidance approach rather than reliability prediction:
- Identify all potential function failure modes, make a risk assessment and implement countermeasures,
- Identify shortfalls in verification test plans and enhance verification tests to ensure detection of all failure modes,
- Execute efficient verification tests that demonstrate that a product is mistake-free and robust under real-world usage conditions.
Our Method
Don Clausing originally suggested Failure Mode Avoidance as a pragmatic strategy to achieve reliability improvement. FMA was successfully developed and implemented at the Ford Motor Company, by the Office of the Technical Fellow for Quality Engineering lead by Tim Davis. Innovensys has further enhanced the Failure Mode Avoidance methodology and offers a more structured and efficient set of logically linked tools, built around a function-driven Design FMEA:
- Boundary Diagram,
- Function Definition,
- Part-to-Function Matrix,
- Function-Driven Design FMEA (DFMEA),
- Parameter Diagram,
- System Interface List,
- Design VMEA,
- Enhanced Robustness Checklist,
- Intelligent Verification Planning,
- Robustness Demonstration Matrix.
